US20090213971A1 - Coherent single antenna interference cancellation for gsm/gprs/edge - Google Patents
Coherent single antenna interference cancellation for gsm/gprs/edge Download PDFInfo
- Publication number
- US20090213971A1 US20090213971A1 US12/038,724 US3872408A US2009213971A1 US 20090213971 A1 US20090213971 A1 US 20090213971A1 US 3872408 A US3872408 A US 3872408A US 2009213971 A1 US2009213971 A1 US 2009213971A1
- Authority
- US
- United States
- Prior art keywords
- midamble
- symbols
- symbol
- estimated
- subset
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001427 coherent effect Effects 0.000 title description 2
- 238000000034 method Methods 0.000 claims abstract description 35
- 125000004122 cyclic group Chemical group 0.000 claims description 11
- 239000011159 matrix material Substances 0.000 claims description 9
- 238000010200 validation analysis Methods 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 description 35
- 238000004891 communication Methods 0.000 description 15
- 238000012549 training Methods 0.000 description 15
- 238000012545 processing Methods 0.000 description 8
- 230000008569 process Effects 0.000 description 7
- 238000007781 pre-processing Methods 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 5
- 230000001629 suppression Effects 0.000 description 5
- 238000013459 approach Methods 0.000 description 3
- 238000013500 data storage Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000007476 Maximum Likelihood Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
- H04L7/042—Detectors therefor, e.g. correlators, state machines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0202—Channel estimation
- H04L25/0224—Channel estimation using sounding signals
- H04L25/0228—Channel estimation using sounding signals with direct estimation from sounding signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/048—Speed or phase control by synchronisation signals using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W56/00—Synchronisation arrangements
Definitions
- the present invention relates to wireless communication and, in particular, relates to coherent single antenna interference cancellation.
- a receiver's ability to properly decode a received signal depends upon the receiver's ability to maintain accurate symbol timing.
- increasing amounts of interference can negatively impact a receiver's ability to maintain this timing.
- a training sequence (e.g., midamble) is known to both a transmitter and a receiver.
- the receiver locates the training sequence in a burst of symbols, and accordingly determines when the data portion of a burst of symbols begins and ends. Locating the training sequence in an environment with interfering signals can be challenging, as the training sequence may easily become overwhelmed by interference from adjacent channels, multipaths and the like. Accordingly, it is desirable to provide a receiver able to reliably locate a training sequence in a burst of symbols in the presence of interference.
- a method for midamble estimation comprises the steps of receiving a burst of symbols, selecting a subset of the burst of symbols that comprises a first midamble symbol, calculating, for each symbol in the subset, a corresponding midamble estimation error, and determining the lowest calculated midamble estimation error to locate the first midamble symbol.
- a method for midamble estimation comprises the steps of receiving a burst of symbols, selecting a subset of the burst of symbols that comprises a first midamble symbol, determining an estimated channel corresponding to each symbol in the subset, suppressing interference on each estimated channel using single antenna interference cancellation, decoding each estimated channel to obtain a corresponding sequence of estimated data symbols, performing a cyclic redundancy check on each sequence of estimated data symbols until a valid condition is detected, and determining the symbol in the subset corresponding to the valid condition to be the first midamble symbol.
- a receiver comprises an antenna configured to receive a burst of symbols, a timing estimator configured to select a subset of the burst of symbols that comprises a first midamble symbol, a midamble estimator configured to calculate, for each symbol in the subset, a corresponding midamble estimation error, and a processor configured to select the symbol in the subset corresponding to a lowest calculated midamble estimation error as the first midamble symbol.
- a receiver comprises an antenna configured to receive a burst of symbols, a timing estimator configured to select a subset of the burst of symbols that comprises a first midamble symbol, a channel estimator configured to determine an estimated channel corresponding to each symbol in the subset, a single antenna interference cancellation device configured to suppress interference on each estimated channel, a data processor configured to decode each estimated channel to obtain a corresponding sequence of estimated data symbols, and a validation device configured to perform a cyclic redundancy check on each sequence of estimated data symbols until a valid condition is detected, and to determine the symbol in the subset corresponding to the valid condition to be the first midamble symbol.
- a machine-readable medium comprises instructions for midamble estimation.
- the instructions comprises code for receiving a burst of symbols, selecting a subset of the burst of symbols that comprises a first midamble symbol, calculating, for each symbol in the subset, a corresponding midamble estimation error, and determining the lowest calculated midamble estimation error to locate the first midamble symbol.
- a machine-readable medium comprises instructions for midamble estimation.
- the instructions comprise code for receiving a burst of symbols, selecting a subset of the burst of symbols that comprises a first midamble symbol, determining an estimated channel corresponding to each symbol in the subset, suppressing interference on each estimated channel using single antenna interference cancellation, decoding each estimated channel to obtain a corresponding sequence of estimated data symbols, performing a cyclic redundancy check on each sequence of estimated data symbols until a valid condition is detected, and determining the symbol in the subset corresponding to the valid condition to be the first midamble symbol.
- FIG. 1 illustrates exemplary frame and burst formats in GSM in accordance with one aspect of the subject technology
- FIG. 2 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology
- FIG. 3 illustrates a subset of symbols, including the first midamble symbol, that a receiver selects in accordance with one aspect of the subject technology
- FIG. 4 illustrates in greater detail a portion of a receiver for use in a wireless communication system in accordance with one aspect of the subject technology
- FIG. 5 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology
- FIG. 6 illustrates in greater detail a portion of a receiver for use in a wireless communication system in accordance with one aspect of the subject technology
- FIG. 7 illustrates a method for midamble estimation in accordance with one aspect of the subject technology
- FIG. 8 illustrates a method for midamble estimation in accordance with one aspect of the subject technology
- FIG. 9 is a chart illustrating performance improvements achievable utilizing various aspects of the subject technology.
- FIG. 10 is a chart illustrating performance improvements achievable utilizing various aspects of the subject technology
- FIG. 11 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology
- FIG. 12 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology
- FIG. 13 is a block diagram illustrating a computer system with which certain aspects of the subject technology may be implemented.
- FIG. 1 shows exemplary frame and burst formats in GSM.
- the timeline for downlink transmission is divided into multiframes.
- each multiframe such as exemplary multiframe 101
- each multiframe includes 26 TDMA frames, which are labeled as TDMA frames 0 through 25 .
- the traffic channels are sent in TDMA frames 0 through 11 and TDMA frames 13 through 24 of each multiframe, as identified by the letter “T” in FIG. 1 .
- a control channel, identified by the letter “C,” is sent in TDMA frame 12 .
- No data is sent in the idle TDMA frame 25 (identified by the letter “I”), which is used by the wireless devices to make measurements for neighbor base stations.
- Each TDMA frame such as exemplary TDMA frame 102 , is further partitioned into eight time slots, which are labeled as time slots 0 through 7 .
- Each active wireless device/user is assigned one time slot index for the duration of a call.
- User-specific data for each wireless device is sent in the time slot assigned to that wireless device and in TDMA frames used for the traffic channels.
- Each burst such as exemplary burst 103 , includes two tail fields, two data fields, a training sequence (or midamble) field, and a guard period (GP). The number of bits in each field is shown inside the parentheses.
- GSM defines eight different training sequences that may be sent in the training sequence field.
- Each training sequence, such as midamble 104 contains 26 bits and is defined such that the first five bits are repeated and the second five bits are also repeated.
- Each training sequence is also defined such that the correlation of that sequence with a 16-bit truncated version of that sequence is equal to (a) sixteen for a time shift of zero, (b) zero for time shifts of ⁇ 1, ⁇ 2, ⁇ 3, ⁇ 4, and ⁇ 5 , and (3) a zero or non-zero value for all other time shifts.
- One approach to locating a midamble in a burst of symbols serially compares hypotheses regarding the midamble position to determine which hypothesis provides the highest correlation energy between the known midamble sequence and the hypothesized position in the burst of symbols. This method is very sensitive to interference from multi-paths of the same midamble sequence, which can cause the correlation energy of inaccurate hypotheses to be affected by time-delayed copies thereof.
- FIG. 2 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology.
- Receiver 200 includes an antenna 210 configured to receive a wireless signal. While receiver 200 may be used in various communication systems, for clarity, receiver 200 is specifically described herein with respect to a GSM system.
- the received signal is provided to a pre-processor 220 which demodulates the signal to generate received samples.
- Pre-processor 220 may include a GMSK-to-BPSK rotator that performs phase rotation on the received samples.
- Timing estimator 230 receives the samples from pre-processor 220 and makes several hypotheses regarding where a training sequence of symbols (i.e., midamble) begins in the burst of data, to provide several hypothetical channel estimates.
- Interference suppressor 240 performs single antenna interference cancellation on each of the hypothesized channels, and midamble estimator 250 generates a midamble estimation error for each hypothesis.
- Timing decision circuit 260 compares the midamble estimation errors for each hypothesis and selects the hypothesis with the lowest midamble estimation error. The selection of a hypothesis by timing decision circuit 260 represents the position in the burst of symbols where the midamble is estimated to begin.
- Data processor 270 then processes the received symbols based upon this estimated timing, and outputs the data corresponding to the received symbols.
- timing estimator 230 performs single antenna interference cancellation (“SAIC”) to provide an estimate of the symbols making up the training sequence, which are compared against the previously-known symbols of that training sequence to determine an estimation error therefor.
- SAIC single antenna interference cancellation
- timing estimator 230 opens a “window” around the estimated beginning of the midamble sequence.
- the position of the first symbol of the midamble sequence can be estimated for a given burst, based upon the known structure of each burst. For example, as illustrated in FIG. 1 , the beginning of midamble 104 in burst 103 begins in the 62 nd bit of the burst. Based upon this known structure, timing estimator 230 selects a window 105 of bits representing a series of hypotheses regarding where the first midamble symbol may be located. Exemplary window 105 is illustrated in greater detail in FIG. 3 .
- Each of these channel estimates is then processed by interference suppressor 240 and midamble estimator 250 to determine estimated midamble symbols corresponding thereto, in order to determine a midamble estimation error therefor, as shown in greater detail below with respect to FIG. 4 .
- window 105 has been illustrated as consisting of exactly 11 symbols, the scope of the present invention is not limited to such an arrangement. Rather, as will be readily apparent to one of skill in the art, any window size (up to the size of the entire data burst) may be selected.
- the size of the search window may be chosen to be twice the size of the expected minimum propagation delay.
- the search window size may be parameterized based on any other metric known to those of skill in the art.
- a channel estimate ⁇ is generated by timing estimator 230 by correlating the received samples (corresponding to the hypothesized delay) with the reference samples (i.e., the known midamble sequence) for each hypothesis. Based on the correlation R ys ( ⁇ ) between received signal y and midamble sequence s for a hypothesized delay ⁇ , the channel estimate may be calculated as follows:
- interference suppressor 240 performs SAIC on each estimated channel.
- SAIC is a method by which oversampled and/or real/imaginary decomposition of a signal is used to provide virtual antennas with separate sample sequences, such that weights may be applied to the virtual antennas to form a beam in the direction of a desired transmitter and a beam null in the direction of an undesired interference source.
- SAIC may be achieved with one or multiple actual antennas at the receiver by using space-time processing, where “space” may be virtually achieved with inphase and quadrature components, and “time” may be achieved using late and early samples.
- the channel estimate previously obtained is then substituted into the spatial temporal channel matrix [H] for one of the rows (each row representing one of the virtual antennas):
- [ H ] [ h 10 h 11 ⁇ h 1 ⁇ v h 20 h 21 ⁇ h 2 ⁇ v ⁇ ⁇ ⁇ ⁇ h M ⁇ ⁇ 0 h M ⁇ ⁇ 1 ⁇ h Mv ] . ( 4 )
- the corresponding received samples for the channel estimate are tuned to the time of the hypothesis (which is assumed to contain the midamble), and the corresponding weights of the interference suppression filter are determined:
- Z′ k is the pseudoinverse of the midamble sequence matrix
- Z′ k [ ⁇ circumflex over (z) ⁇ k 1 ⁇ circumflex over (z) ⁇ k 2 ⁇ circumflex over (z) ⁇ k 3 . . . ⁇ circumflex over (z) ⁇ k p ] T .
- the output of interference suppressor 240 is in the form [H] ⁇ , where [H] represents the channel matrix and ⁇ represents an estimate of the midamble sequence.
- Midamble estimator 250 receives the output of interference suppressor 240 , and cancels out the [H] term (e.g., with Z′ k , the pseudo-inverse of [H]), so that the estimated midamble sequence ⁇ can be compared to the previously-known midamble sequence S.
- Equation 9 Equation 9, below:
- Each time t i is equal to the hypothesized position ⁇ i plus an offset T s from the beginning of the burst:
- FIG. 4 diagrammatically illustrates the foregoing calculations occurring in interference suppressor 240 and midamble estimator 250 , in accordance with one aspect of the subject technology.
- Interference suppressor 240 performs interference cancellation on the channel estimates and re-estimates the channel matrix using the interference suppressed samples.
- Midamble estimator 250 compares the estimated midamble to the known midamble sequence for each hypothesis and generates a midamble estimation error e m .
- the interference suppression and midamble estimation of each channel estimate can be done serially, in parallel, or with some combination of serial and parallel processing.
- timing decision block 260 determines which hypothesis corresponds to the lowest estimation error e m .
- the other hypothesized timing values are discarded, and the signal is passed to data processor 270 for decoding and outputting the data in the signal, based upon the determined timing.
- data processor 270 comprises a soft output generator that receives the signal from timing decision block 260 and generates soft decisions that indicate the confidence in the detected bits.
- a soft output generator may implement an Ono algorithm, as is well known to those of skill in the art.
- Data processor 270 may further comprise a de-interleaver that de-interleaves the soft decisions, and passes the soft decisions to a Viterbi decoder that decodes the deinterleaved soft decisions and outputs decoded data.
- the metric used to determine which midamble timing hypothesis is correct may be a cyclic redundancy check performed after each hypothesis is decoded.
- FIG. 5 illustrates a receiver 500 in accordance with one aspect of the subject technology, in which the timing decision is delayed until after the signal corresponding to each hypothesis is decoded.
- Receiver 500 includes an antenna 510 configured to receive a wireless signal such as, for example, an RF modulated GSM signal.
- the received signal is provided to a pre-processor 520 which demodulates the signal to generate received samples.
- Pre-processor 520 may also include a GMSK-to-BPSK rotator that performs phase rotation on the received samples.
- Timing estimator 530 receives the samples from pre-processor 520 and makes several hypotheses regarding where a midamble begins in the burst of data, to provide several hypothetical channel estimates.
- Interference suppressor 540 performs single antenna interference cancellation on each of the hypothesized channels, and data processor 550 then processes the received symbols for each hypothesized channel, and outputs the data corresponding to the received symbols.
- a cyclic redundancy check (“CRC”) 560 is performed on the data outputted for each hypothesized channel, and continues until one of the data streams is validated. Timing decision block 570 then selects the hypothesis corresponding to the validation condition, and discards the other hypotheses.
- CRC cyclic redundancy check
- FIG. 6 illustrates the operation of interference suppressor 540 and data processor 550 in greater detail, in accordance with one aspect of the subject technology.
- Interference suppressor 540 receives the channel estimates ⁇ (t 0 ) through ⁇ (t 6 ) from timing estimator 530 , and performs both SAIC and maximum likelihood sequence estimate (“MLSE”) equalization on each channel estimate.
- Interference suppressor 540 then provides the filtered signals corresponding to each hypothesis to data processor.
- Data processor 550 comprises a plurality of soft output generators that receive the filtered signals from interference suppressor 540 and generate soft decisions that indicate the confidence in the detected bits.
- Data processor 550 further comprise a plurality of de-interleavers that de-interleave the soft decisions, and that pass the soft decisions to a plurality of Viterbi decoders that decode the deinterleaved soft decisions and outputs decoded data to CRC block 560 .
- the scope of the present invention is not limited to such an arrangement. Rather, a single interference suppressor and a single data processor may be utilized to process each estimated channel in a serial fashion. Alternatively, the receiver may use a combination of parallel and serial processing (e.g., with two channels per interferences suppressor and data processor, etc.).
- FIG. 7 is a flow chart illustrating a method for midamble estimation in accordance with one aspect of the subject technology.
- the method begins with step 701 , in which a receiver receives a burst of symbols.
- step 702 the receiver selects a subset of the burst of symbols that includes the first midamble symbol.
- step 703 the receiver determines an estimated channel corresponding to each symbol in the selected subset.
- step 704 the receiver performs SAIC on each estimated channel to obtain an estimated midamble sequence.
- the receiver compares each estimated midamble sequence to the previously-known midamble sequence to determine a midamble estimation error corresponding to each estimated channel.
- step 706 the receiver determines which estimated channel corresponds to the lowest midamble estimation error in order to locate the first midamble symbol.
- step 707 based upon the determined location of the first midamble symbol, the data sequence in the burst of symbols is decoded.
- FIG. 8 is a flow chart illustrating a method for midamble estimation in accordance with one aspect of the subject technology.
- the method begins with step 801 , in which a receiver receives a burst of symbols.
- the receiver selects a subset of the burst of symbols that includes the first midamble symbol.
- the receiver determines an estimated channel corresponding to each symbol in the selected subset.
- the receiver performs SAIC on each estimated channel, and in step 805 , each estimated channel is decoded to obtain a sequence of estimated data symbols corresponding thereto.
- the receiver performs a cyclic redundancy check (“CRC”) on the estimated data symbols for each estimated channel until a validity condition is found.
- CRC cyclic redundancy check
- FIG. 9 is a chart illustrating performance improvements achievable utilizing various aspects of the subject technology.
- FIG. 9 charts the frame error rate over a range of carrier to interference (“C/I”) levels for exemplary receiver systems utilizing the midamble estimation techniques described in greater detail above.
- C/I carrier to interference
- a receiver system that estimates midamble timing utilizing midamble estimation error or CRC validity checks is more likely to select one of these preferable timings than receiver system 900 , especially as the amount of interference increases. This improved performance is illustrated in greater detail in FIG.
- these timings enjoy about 6 dB better performance than the average performance of receiver system 900 .
- Even better performance benefits can be achieved with a receiver system that selects midamble timing based upon a CRC of decoded data, with a corresponding increase, however, in processing complexity.
- FIG. 11 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology.
- Receiver 1100 includes an antenna module 1110 configured to receive a wireless signal such as, for example, an RF modulated GSM signal.
- the received signal is provided to a pre-processing module 1120 which demodulates the signal to generate received samples.
- Pre-processing module 1120 may also include a GMSK-to-BPSK rotator that performs phase rotation on the received samples.
- Timing estimation module 1130 receives the samples from pre-processing module 1120 and makes several hypotheses regarding where a training sequence of symbols (midamble) begins in the burst of data, to provide several hypothetical channel estimates.
- Interference suppression module 1140 performs single antenna interference cancellation on each of the hypothesized channels, and midamble estimation module 1150 generates a midamble estimation error for each hypothesis.
- Timing decision module 1160 compares the midamble estimation errors for each hypothesis and selects the hypothesis with the lowest midamble estimation error. The selection of a hypothesis by timing decision module 1160 represents the position in the burst of symbols where the midamble is estimated to begin.
- Data processing module 1170 then processes the received symbols based upon this estimated timing, and outputs the data corresponding to the received symbols.
- FIG. 12 illustrates a receiver 1200 for use in a wireless communication system in accordance with one aspect of the subject technology.
- Receiver 1200 includes an antenna module 1210 configured to receive a wireless signal such as, for example, an RF modulated GSM signal.
- the received signal is provided to a pre-processing module 1220 which demodulates the signal to generate received samples.
- Pre-processing module 1220 may also include a GMSK-to-BPSK rotator that performs phase rotation on the received samples.
- Timing estimation module 1230 receives the samples from pre-processing module 1220 and makes several hypotheses regarding where a training sequence of symbols (midamble) begins in the burst of data, to provide several hypothetical channel estimates.
- Interference suppression module 1240 performs single antenna interference cancellation on each of the hypothesized channels, and data processing module 1250 then processes the received symbols for each hypothesized channel, and outputs the data corresponding to the received symbols.
- a cyclic redundancy check (“CRC”) is performed in module 1260 on the data outputted for each hypothesized channel, and continues until one of the data streams is validated.
- Timing decision module 1270 selects the hypothesis corresponding to the validation condition, and discards the other hypotheses.
- FIG. 13 is a block diagram that illustrates a computer system 1300 upon which an aspect may be implemented.
- Computer system 1300 includes a bus 1302 or other communication mechanism for communicating information, and a processor 1304 coupled with bus 1302 for processing information.
- Computer system 1300 also includes a memory 1306 , such as a random access memory (“RAM”) or other dynamic storage device, coupled to bus 1302 for storing information and instructions to be executed by processor 1304 .
- Memory 1306 may also be used for storing temporary variable or other intermediate information during execution of instructions to be executed by processor 1304 .
- Computer system 1300 further includes a data storage device 1310 , such as a magnetic disk or optical disk, coupled to bus 1302 for storing information and instructions.
- Computer system 1300 may be coupled via I/O module 1308 to a display device (not illustrated), such as a cathode ray tube (“CRT”) or liquid crystal display (“LCD”) for displaying information to a computer user.
- a display device such as a cathode ray tube (“CRT”) or liquid crystal display (“LCD”) for displaying information to a computer user.
- An input device such as, for example, a keyboard or a mouse may also be coupled to computer system 1300 via I/O module 1308 for communicating information and command selections to processor 1304 .
- midamble estimation is performed by a computer system 1300 in response to processor 1304 executing one or more sequences of one or more instructions contained in memory 1306 .
- Such instructions may be read into memory 1306 from another machine-readable medium, such as data storage device 1310 .
- Execution of the sequences of instructions contained in main memory 1306 causes processor 1304 to perform the process steps described herein.
- processors in a multi-processing arrangement may also be employed to execute the sequences of instructions contained in memory 1306 .
- hard-wired circuitry may be used in place of or in combination with software instructions to implement various aspects. Thus, aspects are not limited to any specific combination of hardware circuitry and software.
- machine-readable medium refers to any medium that participates in providing instructions to processor 1304 for execution. Such a medium may take many forms, including, but not limited to, non-volatile media, volatile media, and transmission media.
- Non-volatile media include, for example, optical or magnetic disks, such as data storage device 1310 .
- Volatile media include dynamic memory, such as memory 1306 .
- Transmission media include coaxial cables, copper wire, and fiber optics, including the wires that comprise bus 1302 . Transmission media can also take the form of acoustic or light waves, such as those generated during radio frequency and infrared data communications.
- Machine-readable media include, for example, floppy disk, a flexible disk, hard disk, magnetic tape, any other magnetic medium, a CD-ROM, DVD, any other optical medium, punch cards, paper tape, any other physical medium with patterns of holes, a RAM, a PROM, an EPROM, a FLASH EPROM, any other memory chip or cartridge, a carrier wave, or any other medium from which a computer can read.
Abstract
Description
- 1. Field
- The present invention relates to wireless communication and, in particular, relates to coherent single antenna interference cancellation.
- 2. Background
- In many communication systems utilizing GSM, GPRS, EDGE or the like, a receiver's ability to properly decode a received signal depends upon the receiver's ability to maintain accurate symbol timing. As wireless communications become ever more prevalent, however, increasing amounts of interference can negatively impact a receiver's ability to maintain this timing.
- In one approach to maintaining symbol timing, a training sequence (e.g., midamble) is known to both a transmitter and a receiver. The receiver locates the training sequence in a burst of symbols, and accordingly determines when the data portion of a burst of symbols begins and ends. Locating the training sequence in an environment with interfering signals can be challenging, as the training sequence may easily become overwhelmed by interference from adjacent channels, multipaths and the like. Accordingly, it is desirable to provide a receiver able to reliably locate a training sequence in a burst of symbols in the presence of interference.
- According to one aspect of the subject technology, a method for midamble estimation comprises the steps of receiving a burst of symbols, selecting a subset of the burst of symbols that comprises a first midamble symbol, calculating, for each symbol in the subset, a corresponding midamble estimation error, and determining the lowest calculated midamble estimation error to locate the first midamble symbol.
- According to another aspect of the subject technology, a method for midamble estimation comprises the steps of receiving a burst of symbols, selecting a subset of the burst of symbols that comprises a first midamble symbol, determining an estimated channel corresponding to each symbol in the subset, suppressing interference on each estimated channel using single antenna interference cancellation, decoding each estimated channel to obtain a corresponding sequence of estimated data symbols, performing a cyclic redundancy check on each sequence of estimated data symbols until a valid condition is detected, and determining the symbol in the subset corresponding to the valid condition to be the first midamble symbol.
- According to yet another aspect of the subject technology, a receiver comprises an antenna configured to receive a burst of symbols, a timing estimator configured to select a subset of the burst of symbols that comprises a first midamble symbol, a midamble estimator configured to calculate, for each symbol in the subset, a corresponding midamble estimation error, and a processor configured to select the symbol in the subset corresponding to a lowest calculated midamble estimation error as the first midamble symbol.
- According to yet another aspect of the subject technology, a receiver comprises an antenna configured to receive a burst of symbols, a timing estimator configured to select a subset of the burst of symbols that comprises a first midamble symbol, a channel estimator configured to determine an estimated channel corresponding to each symbol in the subset, a single antenna interference cancellation device configured to suppress interference on each estimated channel, a data processor configured to decode each estimated channel to obtain a corresponding sequence of estimated data symbols, and a validation device configured to perform a cyclic redundancy check on each sequence of estimated data symbols until a valid condition is detected, and to determine the symbol in the subset corresponding to the valid condition to be the first midamble symbol.
- According to yet another aspect of the subject technology, a machine-readable medium comprises instructions for midamble estimation. The instructions comprises code for receiving a burst of symbols, selecting a subset of the burst of symbols that comprises a first midamble symbol, calculating, for each symbol in the subset, a corresponding midamble estimation error, and determining the lowest calculated midamble estimation error to locate the first midamble symbol.
- According to yet another aspect of the subject technology, a machine-readable medium comprises instructions for midamble estimation. The instructions comprise code for receiving a burst of symbols, selecting a subset of the burst of symbols that comprises a first midamble symbol, determining an estimated channel corresponding to each symbol in the subset, suppressing interference on each estimated channel using single antenna interference cancellation, decoding each estimated channel to obtain a corresponding sequence of estimated data symbols, performing a cyclic redundancy check on each sequence of estimated data symbols until a valid condition is detected, and determining the symbol in the subset corresponding to the valid condition to be the first midamble symbol.
- It is understood that other configurations of the subject technology will become readily apparent to those skilled in the art from the following detailed description, wherein various configurations of the subject technology are shown and described by way of illustration. As will be realized, the subject technology is capable of other and different configurations and its several details are capable of modification in various other respects, all without departing from the scope of the subject technology. Accordingly, the drawings and detailed description are to be regarded as illustrative in nature and not as restrictive.
-
FIG. 1 illustrates exemplary frame and burst formats in GSM in accordance with one aspect of the subject technology; -
FIG. 2 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology; -
FIG. 3 illustrates a subset of symbols, including the first midamble symbol, that a receiver selects in accordance with one aspect of the subject technology; -
FIG. 4 illustrates in greater detail a portion of a receiver for use in a wireless communication system in accordance with one aspect of the subject technology; -
FIG. 5 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology; -
FIG. 6 illustrates in greater detail a portion of a receiver for use in a wireless communication system in accordance with one aspect of the subject technology; -
FIG. 7 illustrates a method for midamble estimation in accordance with one aspect of the subject technology; -
FIG. 8 illustrates a method for midamble estimation in accordance with one aspect of the subject technology; -
FIG. 9 is a chart illustrating performance improvements achievable utilizing various aspects of the subject technology; -
FIG. 10 is a chart illustrating performance improvements achievable utilizing various aspects of the subject technology; -
FIG. 11 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology; -
FIG. 12 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology; and -
FIG. 13 is a block diagram illustrating a computer system with which certain aspects of the subject technology may be implemented. -
FIG. 1 shows exemplary frame and burst formats in GSM. The timeline for downlink transmission is divided into multiframes. For traffic channels used to send user-specific data, each multiframe, such asexemplary multiframe 101, includes 26 TDMA frames, which are labeled asTDMA frames 0 through 25. The traffic channels are sent inTDMA frames 0 through 11 and TDMA frames 13 through 24 of each multiframe, as identified by the letter “T” inFIG. 1 . A control channel, identified by the letter “C,” is sent in TDMA frame 12. No data is sent in the idle TDMA frame 25 (identified by the letter “I”), which is used by the wireless devices to make measurements for neighbor base stations. - Each TDMA frame, such as
exemplary TDMA frame 102, is further partitioned into eight time slots, which are labeled astime slots 0 through 7. Each active wireless device/user is assigned one time slot index for the duration of a call. User-specific data for each wireless device is sent in the time slot assigned to that wireless device and in TDMA frames used for the traffic channels. - The transmission in each time slot is called a “burst” in GSM. Each burst, such as
exemplary burst 103, includes two tail fields, two data fields, a training sequence (or midamble) field, and a guard period (GP). The number of bits in each field is shown inside the parentheses. GSM defines eight different training sequences that may be sent in the training sequence field. Each training sequence, such asmidamble 104, contains 26 bits and is defined such that the first five bits are repeated and the second five bits are also repeated. Each training sequence is also defined such that the correlation of that sequence with a 16-bit truncated version of that sequence is equal to (a) sixteen for a time shift of zero, (b) zero for time shifts of ±1, ±2, ±3, ±4, and ±5, and (3) a zero or non-zero value for all other time shifts. - One approach to locating a midamble in a burst of symbols serially compares hypotheses regarding the midamble position to determine which hypothesis provides the highest correlation energy between the known midamble sequence and the hypothesized position in the burst of symbols. This method is very sensitive to interference from multi-paths of the same midamble sequence, which can cause the correlation energy of inaccurate hypotheses to be affected by time-delayed copies thereof.
-
FIG. 2 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology.Receiver 200 includes anantenna 210 configured to receive a wireless signal. Whilereceiver 200 may be used in various communication systems, for clarity,receiver 200 is specifically described herein with respect to a GSM system. The received signal is provided to a pre-processor 220 which demodulates the signal to generate received samples. Pre-processor 220 may include a GMSK-to-BPSK rotator that performs phase rotation on the received samples.Timing estimator 230 receives the samples from pre-processor 220 and makes several hypotheses regarding where a training sequence of symbols (i.e., midamble) begins in the burst of data, to provide several hypothetical channel estimates.Interference suppressor 240 performs single antenna interference cancellation on each of the hypothesized channels, andmidamble estimator 250 generates a midamble estimation error for each hypothesis.Timing decision circuit 260 compares the midamble estimation errors for each hypothesis and selects the hypothesis with the lowest midamble estimation error. The selection of a hypothesis bytiming decision circuit 260 represents the position in the burst of symbols where the midamble is estimated to begin.Data processor 270 then processes the received symbols based upon this estimated timing, and outputs the data corresponding to the received symbols. - Rather than utilizing a determined correlation energy to select which hypothesis regarding the midamble timing is accurate,
timing estimator 230 performs single antenna interference cancellation (“SAIC”) to provide an estimate of the symbols making up the training sequence, which are compared against the previously-known symbols of that training sequence to determine an estimation error therefor. The operation oftiming estimator 230 is illustrated in greater detail below. - To begin the search for the first midamble symbol,
timing estimator 230 opens a “window” around the estimated beginning of the midamble sequence. The position of the first symbol of the midamble sequence can be estimated for a given burst, based upon the known structure of each burst. For example, as illustrated inFIG. 1 , the beginning ofmidamble 104 inburst 103 begins in the 62nd bit of the burst. Based upon this known structure,timing estimator 230 selects awindow 105 of bits representing a series of hypotheses regarding where the first midamble symbol may be located.Exemplary window 105 is illustrated in greater detail inFIG. 3 . - As can be seen with reference to
FIG. 3 ,exemplary window 105 comprises 11 symbols, labeled Δ=0 to Δ=10. Each A value represents the position of the symbol in the window. With reference to the position of a symbol in the entire burst, however, the Δ value is offset by an offset value (e.g., Δ=5 may be offset by 61 to represent the position of this symbol in the entire burst). For the first seven symbols inwindow 105,timing estimator 230 generates a channel estimate from a sequence of five contiguous symbols (representing the five-tap channel format of GSM). For example, symbol Δ=0 corresponds to channel estimate ĥ(t0), symbol Δ=1 corresponds to channel estimate ĥ(t1), etc. Each of these channel estimates is then processed byinterference suppressor 240 andmidamble estimator 250 to determine estimated midamble symbols corresponding thereto, in order to determine a midamble estimation error therefor, as shown in greater detail below with respect toFIG. 4 . - While in the present exemplary aspect,
window 105 has been illustrated as consisting of exactly 11 symbols, the scope of the present invention is not limited to such an arrangement. Rather, as will be readily apparent to one of skill in the art, any window size (up to the size of the entire data burst) may be selected. For example, in accordance with one aspect of the subject technology, the size of the search window may be chosen to be twice the size of the expected minimum propagation delay. Alternatively, the search window size may be parameterized based on any other metric known to those of skill in the art. - According to one aspect, a channel estimate ĥ is generated by timing
estimator 230 by correlating the received samples (corresponding to the hypothesized delay) with the reference samples (i.e., the known midamble sequence) for each hypothesis. Based on the correlation Rys(Δ) between received signal y and midamble sequence s for a hypothesized delay Δ, the channel estimate may be calculated as follows: -
- To test the hypothesis corresponding to each channel estimate,
interference suppressor 240 performs SAIC on each estimated channel. SAIC is a method by which oversampled and/or real/imaginary decomposition of a signal is used to provide virtual antennas with separate sample sequences, such that weights may be applied to the virtual antennas to form a beam in the direction of a desired transmitter and a beam null in the direction of an undesired interference source. In general, SAIC may be achieved with one or multiple actual antennas at the receiver by using space-time processing, where “space” may be virtually achieved with inphase and quadrature components, and “time” may be achieved using late and early samples. - After SAIC, the channel estimate previously obtained is then substituted into the spatial temporal channel matrix [H] for one of the rows (each row representing one of the virtual antennas):
-
- The corresponding received samples for the channel estimate are tuned to the time of the hypothesis (which is assumed to contain the midamble), and the corresponding weights of the interference suppression filter are determined:
-
W SAIC(t k)[X] tk ={circumflex over (Z)} k =[{circumflex over (z)} k 1 {circumflex over (z)} k 2 {circumflex over (z)} k 3 . . . {circumflex over (z)} k p] (5) - where
-
- which is a M×1 columnvector for the kth hypothesis.
- The channel matrix [H] is then re-estimated using the interference suppressed samples, to generate [H]k new:
-
[H] k new =Z′ k S + (7) - where Z′k is the pseudoinverse of the midamble sequence matrix:
-
Z′k=[{circumflex over (z)} k 1 {circumflex over (z)} k 2 {circumflex over (z)} k 3 . . . {circumflex over (z)} k p]T. (8) - The output of
interference suppressor 240 is in the form [H]Ŝ, where [H] represents the channel matrix and Ŝ represents an estimate of the midamble sequence.Midamble estimator 250 receives the output ofinterference suppressor 240, and cancels out the [H] term (e.g., with Z′k, the pseudo-inverse of [H]), so that the estimated midamble sequence Ŝ can be compared to the previously-known midamble sequence S. The difference between the estimated and known midamble sequences is determined according toEquation 9, below: -
∥S−Ŝ∥ 2 =e m(t i) (9) - to obtain a midamble estimation error em(ti) for each time ti. Each time ti is equal to the hypothesized position Δi plus an offset Ts from the beginning of the burst:
-
t i=Δi +T s (10) -
FIG. 4 diagrammatically illustrates the foregoing calculations occurring ininterference suppressor 240 andmidamble estimator 250, in accordance with one aspect of the subject technology.Interference suppressor 240 performs interference cancellation on the channel estimates and re-estimates the channel matrix using the interference suppressed samples.Midamble estimator 250 compares the estimated midamble to the known midamble sequence for each hypothesis and generates a midamble estimation error em. According to various aspects of the subject technology, the interference suppression and midamble estimation of each channel estimate can be done serially, in parallel, or with some combination of serial and parallel processing. - Once the midamble estimation error em(ti) for each time ti is determined,
timing decision block 260 determines which hypothesis corresponds to the lowest estimation error em. The other hypothesized timing values are discarded, and the signal is passed todata processor 270 for decoding and outputting the data in the signal, based upon the determined timing. - According to one aspect of the subject disclosure,
data processor 270 comprises a soft output generator that receives the signal fromtiming decision block 260 and generates soft decisions that indicate the confidence in the detected bits. A soft output generator may implement an Ono algorithm, as is well known to those of skill in the art.Data processor 270 may further comprise a de-interleaver that de-interleaves the soft decisions, and passes the soft decisions to a Viterbi decoder that decodes the deinterleaved soft decisions and outputs decoded data. - According to another aspect of the subject technology, the metric used to determine which midamble timing hypothesis is correct may be a cyclic redundancy check performed after each hypothesis is decoded. For example,
FIG. 5 illustrates areceiver 500 in accordance with one aspect of the subject technology, in which the timing decision is delayed until after the signal corresponding to each hypothesis is decoded. -
Receiver 500 includes anantenna 510 configured to receive a wireless signal such as, for example, an RF modulated GSM signal. The received signal is provided to a pre-processor 520 which demodulates the signal to generate received samples.Pre-processor 520 may also include a GMSK-to-BPSK rotator that performs phase rotation on the received samples.Timing estimator 530 receives the samples frompre-processor 520 and makes several hypotheses regarding where a midamble begins in the burst of data, to provide several hypothetical channel estimates.Interference suppressor 540 performs single antenna interference cancellation on each of the hypothesized channels, anddata processor 550 then processes the received symbols for each hypothesized channel, and outputs the data corresponding to the received symbols. A cyclic redundancy check (“CRC”) 560 is performed on the data outputted for each hypothesized channel, and continues until one of the data streams is validated.Timing decision block 570 then selects the hypothesis corresponding to the validation condition, and discards the other hypotheses. -
FIG. 6 illustrates the operation ofinterference suppressor 540 anddata processor 550 in greater detail, in accordance with one aspect of the subject technology.Interference suppressor 540 receives the channel estimates ĥ(t0) through ĥ(t6) fromtiming estimator 530, and performs both SAIC and maximum likelihood sequence estimate (“MLSE”) equalization on each channel estimate.Interference suppressor 540 then provides the filtered signals corresponding to each hypothesis to data processor.Data processor 550 comprises a plurality of soft output generators that receive the filtered signals frominterference suppressor 540 and generate soft decisions that indicate the confidence in the detected bits.Data processor 550 further comprise a plurality of de-interleavers that de-interleave the soft decisions, and that pass the soft decisions to a plurality of Viterbi decoders that decode the deinterleaved soft decisions and outputs decoded data to CRC block 560. - While the foregoing exemplary aspect is illustrated as performing the interference suppression and decoding on each estimated channel in parallel, the scope of the present invention is not limited to such an arrangement. Rather, a single interference suppressor and a single data processor may be utilized to process each estimated channel in a serial fashion. Alternatively, the receiver may use a combination of parallel and serial processing (e.g., with two channels per interferences suppressor and data processor, etc.).
-
FIG. 7 is a flow chart illustrating a method for midamble estimation in accordance with one aspect of the subject technology. The method begins withstep 701, in which a receiver receives a burst of symbols. Instep 702, the receiver selects a subset of the burst of symbols that includes the first midamble symbol. Instep 703, the receiver determines an estimated channel corresponding to each symbol in the selected subset. Instep 704, the receiver performs SAIC on each estimated channel to obtain an estimated midamble sequence. Instep 705, the receiver compares each estimated midamble sequence to the previously-known midamble sequence to determine a midamble estimation error corresponding to each estimated channel. Instep 706, the receiver determines which estimated channel corresponds to the lowest midamble estimation error in order to locate the first midamble symbol. Instep 707, based upon the determined location of the first midamble symbol, the data sequence in the burst of symbols is decoded. -
FIG. 8 is a flow chart illustrating a method for midamble estimation in accordance with one aspect of the subject technology. The method begins withstep 801, in which a receiver receives a burst of symbols. Instep 802, the receiver selects a subset of the burst of symbols that includes the first midamble symbol. Instep 803, the receiver determines an estimated channel corresponding to each symbol in the selected subset. Instep 804, the receiver performs SAIC on each estimated channel, and instep 805, each estimated channel is decoded to obtain a sequence of estimated data symbols corresponding thereto. Instep 806, the receiver performs a cyclic redundancy check (“CRC”) on the estimated data symbols for each estimated channel until a validity condition is found. Instep 807, the receiver determines the symbol in the subset selected instep 802 that corresponds to the validity condition to be the first midamble symbol. -
FIG. 9 is a chart illustrating performance improvements achievable utilizing various aspects of the subject technology.FIG. 9 charts the frame error rate over a range of carrier to interference (“C/I”) levels for exemplary receiver systems utilizing the midamble estimation techniques described in greater detail above. As can be seen with reference toFIG. 9 , the performance of a receiver system 900 that estimates midamble timing using correlation energy is less than optimal, as there exist four timing hypotheses (Δ=3, Δ=4, Δ=5 & Δ=6) that provide improved frame error rate. A receiver system that estimates midamble timing utilizing midamble estimation error or CRC validity checks is more likely to select one of these preferable timings than receiver system 900, especially as the amount of interference increases. This improved performance is illustrated in greater detail inFIG. 10 , in which the probability with which an exemplary receiver system utilizing midamble estimation error will choose a given midamble timing. As can be seen with reference toFIG. 10 , receiver system 900 (which estimates midamble timing using correlation energy) chooses sub-optimal midamble symbol timing values (e.g., Δ=0, Δ=1, Δ=2) with greater frequency than a receiver system 1002 that estimates midamble timing using midamble estimation error. Indeed, receiver system 1002 selects either Δ=5 and Δ=6 more than 80% of the time. As can be seen with reference toFIG. 9 , these timings enjoy about 6 dB better performance than the average performance of receiver system 900. Even better performance benefits can be achieved with a receiver system that selects midamble timing based upon a CRC of decoded data, with a corresponding increase, however, in processing complexity. -
FIG. 11 illustrates a receiver for use in a wireless communication system in accordance with one aspect of the subject technology. Receiver 1100 includes anantenna module 1110 configured to receive a wireless signal such as, for example, an RF modulated GSM signal. The received signal is provided to apre-processing module 1120 which demodulates the signal to generate received samples.Pre-processing module 1120 may also include a GMSK-to-BPSK rotator that performs phase rotation on the received samples. Timingestimation module 1130 receives the samples frompre-processing module 1120 and makes several hypotheses regarding where a training sequence of symbols (midamble) begins in the burst of data, to provide several hypothetical channel estimates.Interference suppression module 1140 performs single antenna interference cancellation on each of the hypothesized channels, andmidamble estimation module 1150 generates a midamble estimation error for each hypothesis.Timing decision module 1160 compares the midamble estimation errors for each hypothesis and selects the hypothesis with the lowest midamble estimation error. The selection of a hypothesis by timingdecision module 1160 represents the position in the burst of symbols where the midamble is estimated to begin.Data processing module 1170 then processes the received symbols based upon this estimated timing, and outputs the data corresponding to the received symbols. -
FIG. 12 illustrates a receiver 1200 for use in a wireless communication system in accordance with one aspect of the subject technology. Receiver 1200 includes anantenna module 1210 configured to receive a wireless signal such as, for example, an RF modulated GSM signal. The received signal is provided to apre-processing module 1220 which demodulates the signal to generate received samples.Pre-processing module 1220 may also include a GMSK-to-BPSK rotator that performs phase rotation on the received samples. Timingestimation module 1230 receives the samples frompre-processing module 1220 and makes several hypotheses regarding where a training sequence of symbols (midamble) begins in the burst of data, to provide several hypothetical channel estimates.Interference suppression module 1240 performs single antenna interference cancellation on each of the hypothesized channels, anddata processing module 1250 then processes the received symbols for each hypothesized channel, and outputs the data corresponding to the received symbols. A cyclic redundancy check (“CRC”) is performed inmodule 1260 on the data outputted for each hypothesized channel, and continues until one of the data streams is validated.Timing decision module 1270 then selects the hypothesis corresponding to the validation condition, and discards the other hypotheses. -
FIG. 13 is a block diagram that illustrates acomputer system 1300 upon which an aspect may be implemented.Computer system 1300 includes abus 1302 or other communication mechanism for communicating information, and aprocessor 1304 coupled withbus 1302 for processing information.Computer system 1300 also includes amemory 1306, such as a random access memory (“RAM”) or other dynamic storage device, coupled tobus 1302 for storing information and instructions to be executed byprocessor 1304.Memory 1306 may also be used for storing temporary variable or other intermediate information during execution of instructions to be executed byprocessor 1304.Computer system 1300 further includes adata storage device 1310, such as a magnetic disk or optical disk, coupled tobus 1302 for storing information and instructions. -
Computer system 1300 may be coupled via I/O module 1308 to a display device (not illustrated), such as a cathode ray tube (“CRT”) or liquid crystal display (“LCD”) for displaying information to a computer user. An input device, such as, for example, a keyboard or a mouse may also be coupled tocomputer system 1300 via I/O module 1308 for communicating information and command selections toprocessor 1304. - According to one aspect, midamble estimation is performed by a
computer system 1300 in response toprocessor 1304 executing one or more sequences of one or more instructions contained inmemory 1306. Such instructions may be read intomemory 1306 from another machine-readable medium, such asdata storage device 1310. Execution of the sequences of instructions contained inmain memory 1306 causesprocessor 1304 to perform the process steps described herein. One or more processors in a multi-processing arrangement may also be employed to execute the sequences of instructions contained inmemory 1306. In alternative aspects, hard-wired circuitry may be used in place of or in combination with software instructions to implement various aspects. Thus, aspects are not limited to any specific combination of hardware circuitry and software. - The term “machine-readable medium” as used herein refers to any medium that participates in providing instructions to
processor 1304 for execution. Such a medium may take many forms, including, but not limited to, non-volatile media, volatile media, and transmission media. Non-volatile media include, for example, optical or magnetic disks, such asdata storage device 1310. Volatile media include dynamic memory, such asmemory 1306. Transmission media include coaxial cables, copper wire, and fiber optics, including the wires that comprisebus 1302. Transmission media can also take the form of acoustic or light waves, such as those generated during radio frequency and infrared data communications. Common forms of machine-readable media include, for example, floppy disk, a flexible disk, hard disk, magnetic tape, any other magnetic medium, a CD-ROM, DVD, any other optical medium, punch cards, paper tape, any other physical medium with patterns of holes, a RAM, a PROM, an EPROM, a FLASH EPROM, any other memory chip or cartridge, a carrier wave, or any other medium from which a computer can read. - Those of skill in the art would appreciate that the various illustrative blocks, modules, elements, components, methods, and algorithms described herein may be implemented as electronic hardware, computer software, or combinations of both. Furthermore, these may be partitioned differently than what is described. To illustrate this interchangeability of hardware and software, various illustrative blocks, modules, elements, components, methods, and algorithms have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application.
- It is understood that the specific order or hierarchy of steps or blocks in the processes disclosed is an illustration of exemplary approaches. Based upon design preferences, it is understood that the specific order or hierarchy of steps or blocks in the processes may be rearranged. The accompanying method claims present elements of the various steps in a sample order, and are not meant to be limited to the specific order or hierarchy presented.
- The previous description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects. Thus, the claims are not intended to be limited to the aspects shown herein, but is to be accorded the full scope consistent with the language claims, wherein reference to an element in the singular is not intended to mean “one and only one” unless specifically so stated, but rather “one or more.” Unless specifically stated otherwise, the term “some” refers to one or more. Pronouns in the masculine (e.g., his) include the feminine and neuter gender (e.g., her and its) and vice versa. All structural and functional equivalents to the elements of the various aspects described throughout this disclosure that are known or later come to be known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the claims. Moreover, nothing disclosed herein is intended to be dedicated to the public regardless of whether such disclosure is explicitly recited in the claims. No claim element is to be construed under the provisions of 35 U.S.C. § 112, sixth paragraph, unless the element is expressly recited using the phrase “means for” or, in the case of a method claim, the element is recited using the phrase “step for.”
Claims (46)
Priority Applications (13)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/038,724 US7933256B2 (en) | 2008-02-27 | 2008-02-27 | Coherent single antenna interference cancellation for GSM/GPRS/EDGE |
CN201410643190.9A CN104393901B (en) | 2008-02-27 | 2009-02-20 | GSM/GPRS/EDGE relevant single antenna interference cancellation |
KR1020107021451A KR101169162B1 (en) | 2008-02-27 | 2009-02-20 | Coherent single antenna interference cancellation for gsm/gprs/edge |
EP11152777A EP2330770A1 (en) | 2008-02-27 | 2009-02-20 | Coherent single antenna interference cancellation for GSM/GPRS/edge |
EP09716037.8A EP2253095B1 (en) | 2008-02-27 | 2009-02-20 | Coherent single antenna interference cancellation for gsm/gprs/edge |
JP2010548812A JP5254367B2 (en) | 2008-02-27 | 2009-02-20 | Coherent single antenna interference cancellation for GSM (R) / GPRS / EDGE |
BRPI0907899-1A BRPI0907899A2 (en) | 2008-02-27 | 2009-02-20 | coherent cancellation of single antenna interference for gsm / gprs / edge |
CN200980106521.2A CN101960772B (en) | 2008-02-27 | 2009-02-20 | Coherent single antenna interference cancellation for GSM/GPRS/EDGE |
PCT/US2009/034794 WO2009108586A2 (en) | 2008-02-27 | 2009-02-20 | Coherent single antenna interference cancellation for gsm/gprs/edge |
KR1020117022871A KR101169180B1 (en) | 2008-02-27 | 2009-02-20 | Coherent single antenna interference cancellation for gsm/gprs/edge |
RU2010139398/08A RU2461135C2 (en) | 2008-02-27 | 2009-02-20 | Coherent single antenna interference compensation for gsm/gprs/edge |
CA2713407A CA2713407C (en) | 2008-02-27 | 2009-02-20 | Coherent single antenna interference cancellation for gsm/gprs/edge |
TW098106198A TWI530149B (en) | 2008-02-27 | 2009-02-26 | Coherent single antenna interference cancellation for gsm/gprs/edge |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/038,724 US7933256B2 (en) | 2008-02-27 | 2008-02-27 | Coherent single antenna interference cancellation for GSM/GPRS/EDGE |
Publications (2)
Publication Number | Publication Date |
---|---|
US20090213971A1 true US20090213971A1 (en) | 2009-08-27 |
US7933256B2 US7933256B2 (en) | 2011-04-26 |
Family
ID=40666840
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/038,724 Active 2028-10-15 US7933256B2 (en) | 2008-02-27 | 2008-02-27 | Coherent single antenna interference cancellation for GSM/GPRS/EDGE |
Country Status (10)
Country | Link |
---|---|
US (1) | US7933256B2 (en) |
EP (2) | EP2330770A1 (en) |
JP (1) | JP5254367B2 (en) |
KR (2) | KR101169162B1 (en) |
CN (2) | CN104393901B (en) |
BR (1) | BRPI0907899A2 (en) |
CA (1) | CA2713407C (en) |
RU (1) | RU2461135C2 (en) |
TW (1) | TWI530149B (en) |
WO (1) | WO2009108586A2 (en) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100046682A1 (en) * | 2008-08-19 | 2010-02-25 | Qualcomm Incorporated | Enhanced geran receiver using channel input beamforming |
US20100046595A1 (en) * | 2008-08-19 | 2010-02-25 | Qualcomm Incorporated | Semi-coherent timing propagation for geran multislot configurations |
US20100278227A1 (en) * | 2009-04-30 | 2010-11-04 | Qualcomm Incorporated | Hybrid saic receiver |
CN101938437A (en) * | 2010-09-15 | 2011-01-05 | 华为技术有限公司 | Single antenna interference cancellation (SAIC) capability recognizing method and device |
WO2011028982A3 (en) * | 2009-09-03 | 2011-04-28 | Qualcomm Incorporated | Symbol estimation methods and apparatuses |
CN102158880A (en) * | 2011-04-01 | 2011-08-17 | 华为技术有限公司 | Terminal identification processing method, system and equipment |
US9237515B2 (en) | 2008-08-01 | 2016-01-12 | Qualcomm Incorporated | Successive detection and cancellation for cell pilot detection |
US9277487B2 (en) | 2008-08-01 | 2016-03-01 | Qualcomm Incorporated | Cell detection with interference cancellation |
CN106487723A (en) * | 2015-08-31 | 2017-03-08 | 联芯科技有限公司 | Channel estimation methods and device suitable for single antenna interference cancellation technology |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8611305B2 (en) | 2005-08-22 | 2013-12-17 | Qualcomm Incorporated | Interference cancellation for wireless communications |
US9071344B2 (en) | 2005-08-22 | 2015-06-30 | Qualcomm Incorporated | Reverse link interference cancellation |
US20100046660A1 (en) * | 2008-05-13 | 2010-02-25 | Qualcomm Incorporated | Interference cancellation under non-stationary conditions |
US8995417B2 (en) * | 2008-06-09 | 2015-03-31 | Qualcomm Incorporated | Increasing capacity in wireless communication |
US20100097955A1 (en) * | 2008-10-16 | 2010-04-22 | Qualcomm Incorporated | Rate determination |
US8787509B2 (en) * | 2009-06-04 | 2014-07-22 | Qualcomm Incorporated | Iterative interference cancellation receiver |
US8619928B2 (en) * | 2009-09-03 | 2013-12-31 | Qualcomm Incorporated | Multi-stage interference suppression |
AR079047A1 (en) * | 2009-11-16 | 2011-12-21 | Silver Spring Networks Inc | DETECTION OF STARTING FRAME DELIMITATORS IN A WIRELESS DIGITAL COMMUNICATIONS SYSTEM |
ES2708959T3 (en) | 2009-11-27 | 2019-04-12 | Qualcomm Inc | Greater capacity in wireless communications |
JP6091895B2 (en) | 2009-11-27 | 2017-03-08 | クゥアルコム・インコーポレイテッドQualcomm Incorporated | Increased capacity in wireless communications |
US8804881B2 (en) * | 2010-07-13 | 2014-08-12 | Qualcomm Incorporated | Data communication devices, methods, and systems |
CL2012001772A1 (en) | 2011-07-01 | 2014-06-06 | Wonderland Nursery Goods | A child seat comprising a seat frame with a back, an anchor band that has an intermediate portion and two end portions respectively provided with two operable fasteners for fixing with an anchor structure of a vehicle, and operable closure . |
WO2014027965A1 (en) * | 2012-08-15 | 2014-02-20 | National University Of Singapore | Wound dressing nanomesh impregnated with human umbilical cord wharton's jelly stem cells |
JP2014086739A (en) * | 2012-10-19 | 2014-05-12 | Jvc Kenwood Corp | Wireless device and data reproduction method |
US20160041356A1 (en) | 2013-04-07 | 2016-02-11 | Tyco Electronics (Shanghai) Co., Ltd. | Fiber optic connection assembly |
US20160124173A1 (en) | 2013-06-07 | 2016-05-05 | Adc Telecommunications, Inc. | Telecommunications connection device |
US10211933B2 (en) | 2016-05-19 | 2019-02-19 | Samsung Electronics Co., Ltd. | Method of classifying interferers in co-channel interference by communication device |
US10953847B2 (en) | 2018-03-06 | 2021-03-23 | Shield Restraint Systems | Height adjusters with anti-cinch features for occupant restraint systems |
US11273790B2 (en) | 2018-03-06 | 2022-03-15 | Shield Restraint Systems, Inc. | Height adjusters with anti-cinch features for occupant restraint systems |
WO2019195373A1 (en) | 2018-04-04 | 2019-10-10 | Shield Restraint Systems, Inc. | Energy absorbing devices for use with webs |
Citations (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5267249A (en) * | 1991-05-09 | 1993-11-30 | Codex Corporation | Device and method for asynchronous cyclic redundancy checking for digital receivers |
US20040170234A1 (en) * | 2003-02-27 | 2004-09-02 | Markku Pukkila | Method and apparatus for determining components of a channel impulse response for use in a SAIC equalizer |
US20040192215A1 (en) * | 2003-03-28 | 2004-09-30 | Onggosanusi Eko N. | Linear single-antenna interference cancellation receiver |
US20050111408A1 (en) * | 2003-11-25 | 2005-05-26 | Telefonaktiebolaget Lm Ericsson (Publ) | Selective interference cancellation |
US20050152485A1 (en) * | 2004-01-14 | 2005-07-14 | Nokia Corporation | Joint channel estimator for synchronous and asynchronous interference suppression in SAIC receiver |
US6931030B1 (en) * | 2000-11-30 | 2005-08-16 | Arraycomm, Inc. | Training sequence with a random delay for a radio communications system |
US20060109938A1 (en) * | 2004-11-19 | 2006-05-25 | Raghu Challa | Interference suppression with virtual antennas |
US20060126765A1 (en) * | 2004-12-09 | 2006-06-15 | Eun-Jeong Shin | Apparatus and method for detecting timing error based on cyclic correlation |
US7107031B2 (en) * | 2000-05-31 | 2006-09-12 | Nokia Corporation | Co-channel interference rejection in a digital receiver |
US20060203943A1 (en) * | 2005-03-10 | 2006-09-14 | Comsys Communication & Signal Processing Ltd. | Single antenna interference suppression in a wireless receiver |
US20060227853A1 (en) * | 2002-12-30 | 2006-10-12 | Jingxin Liang | Method and device to maintain synchronization tracking in tdd wireless communication |
US20070058709A1 (en) * | 2005-09-13 | 2007-03-15 | Freescale Semiconductor, Inc. | Dynamic switching between MLSE and linear equalizer for single antenna interference cancellation in a GSM communication system |
US20070127608A1 (en) * | 2005-12-06 | 2007-06-07 | Jacob Scheim | Blind interference mitigation in a digital receiver |
US20070201548A1 (en) * | 2004-03-25 | 2007-08-30 | Benq Mobile Gmbh & Co. Ohg | Method and communication device for interference concellation in a cellular tdma communication system |
US20080125070A1 (en) * | 2003-11-18 | 2008-05-29 | Interdigital Technology Corporation | Method and apparatus for automatic frequency correction with a frequency error signal generated by block correlation of baseband samples with a known code sequence |
US20090058728A1 (en) * | 2004-03-25 | 2009-03-05 | Ayman Mostafa | Interference cancellation and receive diversity for single-valued modulation receivers |
US20090207944A1 (en) * | 2007-12-12 | 2009-08-20 | Harris Corporation | Communications device and related method that detects symbol timing |
US20100046660A1 (en) * | 2008-05-13 | 2010-02-25 | Qualcomm Incorporated | Interference cancellation under non-stationary conditions |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB8910255D0 (en) | 1989-05-04 | 1989-06-21 | Stc Plc | Data stream frame synchronisation |
GB2339120B (en) * | 1998-06-30 | 2003-03-19 | Nec Technologies | Channel estimation device for digital telecommunications stations |
JP2001257626A (en) * | 2000-03-13 | 2001-09-21 | Matsushita Electric Ind Co Ltd | Communication unit and communication method |
JP2001267987A (en) * | 2000-01-14 | 2001-09-28 | Matsushita Electric Ind Co Ltd | Radio base station device and radio communication method |
EP1681775A3 (en) | 2000-03-15 | 2008-12-03 | Interdigital Technology Corporation | Multi-user detection using an adaptive combination of joint detection and successive interference cancellation |
US6985516B1 (en) * | 2000-11-27 | 2006-01-10 | Qualcomm Incorporated | Method and apparatus for processing a received signal in a communications system |
US7031411B2 (en) * | 2001-09-19 | 2006-04-18 | Telefonaktiebolaget L.M. Ericsson | Methods and apparatus for canceling co-channel interference in a receiving system using spatio-temporal whitening |
EP1347611A1 (en) | 2002-03-20 | 2003-09-24 | Siemens Information and Communication Networks S.p.A. | Data aided frequency synchronisation |
US7711377B2 (en) | 2004-06-10 | 2010-05-04 | Qualcomm Incorporated | Efficient paging in a wireless communication system |
US7545893B2 (en) | 2005-11-28 | 2009-06-09 | Telefonaktiebolaget L M Ericsson (Publ) | Single antenna interference cancellation via complement subspace projection in spatial-temporal expansion of noise estimation |
US7599454B2 (en) * | 2006-07-24 | 2009-10-06 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and apparatus for symbol alignment in diversity signal reception |
-
2008
- 2008-02-27 US US12/038,724 patent/US7933256B2/en active Active
-
2009
- 2009-02-20 EP EP11152777A patent/EP2330770A1/en not_active Withdrawn
- 2009-02-20 CN CN201410643190.9A patent/CN104393901B/en not_active Expired - Fee Related
- 2009-02-20 CN CN200980106521.2A patent/CN101960772B/en active Active
- 2009-02-20 KR KR1020107021451A patent/KR101169162B1/en active IP Right Grant
- 2009-02-20 RU RU2010139398/08A patent/RU2461135C2/en not_active IP Right Cessation
- 2009-02-20 JP JP2010548812A patent/JP5254367B2/en active Active
- 2009-02-20 WO PCT/US2009/034794 patent/WO2009108586A2/en active Application Filing
- 2009-02-20 EP EP09716037.8A patent/EP2253095B1/en not_active Not-in-force
- 2009-02-20 KR KR1020117022871A patent/KR101169180B1/en active IP Right Grant
- 2009-02-20 CA CA2713407A patent/CA2713407C/en not_active Expired - Fee Related
- 2009-02-20 BR BRPI0907899-1A patent/BRPI0907899A2/en not_active IP Right Cessation
- 2009-02-26 TW TW098106198A patent/TWI530149B/en not_active IP Right Cessation
Patent Citations (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5267249A (en) * | 1991-05-09 | 1993-11-30 | Codex Corporation | Device and method for asynchronous cyclic redundancy checking for digital receivers |
US7107031B2 (en) * | 2000-05-31 | 2006-09-12 | Nokia Corporation | Co-channel interference rejection in a digital receiver |
US6931030B1 (en) * | 2000-11-30 | 2005-08-16 | Arraycomm, Inc. | Training sequence with a random delay for a radio communications system |
US20060227853A1 (en) * | 2002-12-30 | 2006-10-12 | Jingxin Liang | Method and device to maintain synchronization tracking in tdd wireless communication |
US20040170234A1 (en) * | 2003-02-27 | 2004-09-02 | Markku Pukkila | Method and apparatus for determining components of a channel impulse response for use in a SAIC equalizer |
US7200172B2 (en) * | 2003-02-27 | 2007-04-03 | Nokia Corporation | Method and apparatus for determining components of a channel impulse response for use in a SAIC equalizer |
US20040192215A1 (en) * | 2003-03-28 | 2004-09-30 | Onggosanusi Eko N. | Linear single-antenna interference cancellation receiver |
US7295636B2 (en) * | 2003-03-28 | 2007-11-13 | Texas Instruments Incorporated | Linear single-antenna interference cancellation receiver |
US20080125070A1 (en) * | 2003-11-18 | 2008-05-29 | Interdigital Technology Corporation | Method and apparatus for automatic frequency correction with a frequency error signal generated by block correlation of baseband samples with a known code sequence |
US20050111408A1 (en) * | 2003-11-25 | 2005-05-26 | Telefonaktiebolaget Lm Ericsson (Publ) | Selective interference cancellation |
US20050152485A1 (en) * | 2004-01-14 | 2005-07-14 | Nokia Corporation | Joint channel estimator for synchronous and asynchronous interference suppression in SAIC receiver |
US7308056B2 (en) * | 2004-01-14 | 2007-12-11 | Nokia Corporation | Joint channel estimator for synchronous and asynchronous interference suppression in SAIC receiver |
US20070201548A1 (en) * | 2004-03-25 | 2007-08-30 | Benq Mobile Gmbh & Co. Ohg | Method and communication device for interference concellation in a cellular tdma communication system |
US20090058728A1 (en) * | 2004-03-25 | 2009-03-05 | Ayman Mostafa | Interference cancellation and receive diversity for single-valued modulation receivers |
US20060109938A1 (en) * | 2004-11-19 | 2006-05-25 | Raghu Challa | Interference suppression with virtual antennas |
US20060126765A1 (en) * | 2004-12-09 | 2006-06-15 | Eun-Jeong Shin | Apparatus and method for detecting timing error based on cyclic correlation |
US20060203943A1 (en) * | 2005-03-10 | 2006-09-14 | Comsys Communication & Signal Processing Ltd. | Single antenna interference suppression in a wireless receiver |
US20070058709A1 (en) * | 2005-09-13 | 2007-03-15 | Freescale Semiconductor, Inc. | Dynamic switching between MLSE and linear equalizer for single antenna interference cancellation in a GSM communication system |
US20070127608A1 (en) * | 2005-12-06 | 2007-06-07 | Jacob Scheim | Blind interference mitigation in a digital receiver |
US20090207944A1 (en) * | 2007-12-12 | 2009-08-20 | Harris Corporation | Communications device and related method that detects symbol timing |
US20100046660A1 (en) * | 2008-05-13 | 2010-02-25 | Qualcomm Incorporated | Interference cancellation under non-stationary conditions |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9237515B2 (en) | 2008-08-01 | 2016-01-12 | Qualcomm Incorporated | Successive detection and cancellation for cell pilot detection |
US9277487B2 (en) | 2008-08-01 | 2016-03-01 | Qualcomm Incorporated | Cell detection with interference cancellation |
US20100046682A1 (en) * | 2008-08-19 | 2010-02-25 | Qualcomm Incorporated | Enhanced geran receiver using channel input beamforming |
US20100046595A1 (en) * | 2008-08-19 | 2010-02-25 | Qualcomm Incorporated | Semi-coherent timing propagation for geran multislot configurations |
US8503591B2 (en) | 2008-08-19 | 2013-08-06 | Qualcomm Incorporated | Enhanced geran receiver using channel input beamforming |
US8509293B2 (en) * | 2008-08-19 | 2013-08-13 | Qualcomm Incorporated | Semi-coherent timing propagation for GERAN multislot configurations |
US20100278227A1 (en) * | 2009-04-30 | 2010-11-04 | Qualcomm Incorporated | Hybrid saic receiver |
US9160577B2 (en) | 2009-04-30 | 2015-10-13 | Qualcomm Incorporated | Hybrid SAIC receiver |
WO2011028982A3 (en) * | 2009-09-03 | 2011-04-28 | Qualcomm Incorporated | Symbol estimation methods and apparatuses |
CN101938437A (en) * | 2010-09-15 | 2011-01-05 | 华为技术有限公司 | Single antenna interference cancellation (SAIC) capability recognizing method and device |
CN102158880A (en) * | 2011-04-01 | 2011-08-17 | 华为技术有限公司 | Terminal identification processing method, system and equipment |
CN106487723A (en) * | 2015-08-31 | 2017-03-08 | 联芯科技有限公司 | Channel estimation methods and device suitable for single antenna interference cancellation technology |
Also Published As
Publication number | Publication date |
---|---|
CA2713407A1 (en) | 2009-09-03 |
WO2009108586A2 (en) | 2009-09-03 |
KR101169162B1 (en) | 2012-07-30 |
CN101960772B (en) | 2015-01-14 |
EP2253095A2 (en) | 2010-11-24 |
RU2461135C2 (en) | 2012-09-10 |
TWI530149B (en) | 2016-04-11 |
KR20100118608A (en) | 2010-11-05 |
JP2011517155A (en) | 2011-05-26 |
EP2330770A1 (en) | 2011-06-08 |
BRPI0907899A2 (en) | 2020-08-25 |
US7933256B2 (en) | 2011-04-26 |
CN101960772A (en) | 2011-01-26 |
CN104393901B (en) | 2018-01-26 |
TW200950452A (en) | 2009-12-01 |
RU2010139398A (en) | 2012-04-10 |
WO2009108586A3 (en) | 2009-12-03 |
JP5254367B2 (en) | 2013-08-07 |
KR20110114729A (en) | 2011-10-19 |
EP2253095B1 (en) | 2016-12-21 |
CA2713407C (en) | 2013-07-30 |
KR101169180B1 (en) | 2012-07-30 |
CN104393901A (en) | 2015-03-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7933256B2 (en) | Coherent single antenna interference cancellation for GSM/GPRS/EDGE | |
US8787509B2 (en) | Iterative interference cancellation receiver | |
US8509293B2 (en) | Semi-coherent timing propagation for GERAN multislot configurations | |
US8675796B2 (en) | Interference cancellation under non-stationary conditions | |
US8503591B2 (en) | Enhanced geran receiver using channel input beamforming |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: QUALCOMM INCORPORATED, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:PARK, JONG HYEON;SIM, BOK TAE;KIM, JE WOO;REEL/FRAME:020900/0329 Effective date: 20080428 |
|
AS | Assignment |
Owner name: QUALCOMM INCORPORATED, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ABRISHAMKAR, FARROCKH;SIKRI, DIVAYDEEP;REEL/FRAME:021021/0451;SIGNING DATES FROM 20080430 TO 20080513 Owner name: QUALCOMM INCORPORATED, CALIFORNIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:ABRISHAMKAR, FARROCKH;SIKRI, DIVAYDEEP;SIGNING DATES FROM 20080430 TO 20080513;REEL/FRAME:021021/0451 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 8TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1552); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 8 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 12TH YEAR, LARGE ENTITY (ORIGINAL EVENT CODE: M1553); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY Year of fee payment: 12 |